The present invention relates to a method of fabricating a semiconductor device having a polysilicon member formed by patterning a polysilicon film.
There have conventionally been known an element having a polysilicon member which should be silicided such as the gate electrode of a MOS transistor or the electrode of a capacitor and a semiconductor device having a polysilicon member which need not be silicided such as the resistor film of a resistor or the gate electrode of a high-breakdown-voltage transistor having a protective function against dielectric breakdown.
A description will be given to a conventional method of fabricating, as a conventional semiconductor device, a semiconductor device having a MOS transistor comprising a gate electrode which should be silicided and a high-breakdown-voltage MOS transistor which need not be silicided.
First, a non-doped polysilicon film is formed on a substrate. Then, distinct portions of the polysilicon film are doped with phosphorus as an n-type impurity and boron as a p-type impurity by ion implantation, resulting in separately implanted regions. The doping may be performed before or after the formation of the gate electrode of each of the transistors. If the resistance is to be reduced by using, as a dopant, an impurity at a particularly high concentration, the doping may be performed twice before and after the patterning of the polysilicon film.
Next, annealing (RTA) for activating the implanted impurities is performed. Then, a TEOS film for forming a selective etching mask is deposited over the entire surface of the substrate by a plasma process. The TEOS film is patterned by etching or the like to form the selective etching mask covering a non-silicidation region and having an opening corresponding to a silicidation region.
Next, an impurity for promoting silicidation (for preamorphization) are ion implanted, from above the selective etching mask, into a gate electrode as a polysilicon member in the silicidation region. In the case of a salicidation process, an impurity for promoting silicidation are also ion implanted into source/drain regions.
Thereafter, a refractory metal film is deposited on the substrate such that a reaction is caused between the metal composing the refractory metal film and polysilicon composing the gate electrode (in the case of the salicidation process, polysilicon composing the gate electrode and silicon composing the source/drain regions) to form a silicide film. At this time, the silicide film is not formed in the non-silicidation region where the selective etching mask is interposed between the refractory metal film, the gate electrode, and the source/drain regions. After etching away an unreacted portion of the refractory metal film, a heat treatment for the phase transition of the silicide film is performed.
The foregoing process forms a semiconductor device in which a MOS transistor comprising a polysilicon electrode having a silicided upper portion and a high-breakdown-voltage transistor having a non-silicided gate electrode are provided on a single substrate.
Oftentimes, the polysilicon resistor film of the resistor is formed on an insulating film for isolation in the non-silicidation region. In that case, it follows that the selective etching mask covers the top surface of the polysilicon resistor film in the aforementioned structure.
However, the semiconductor device formed by the conventional fabrication process has the following problems.
First, there are cases where the resistance of the polysilicon film, e.g., the gate resistance of the gate electrode of a MOS transistor or the resistance of the resistive element of a resistor, varies disadvantageously. This is because the impurity implanted in the gate electrode diffuses into an ambient atmosphere (out-diffusion) during a heat treatment for activation. Accordingly, the concentration of the impurity in the polysilicon film doped with the impurity is reduced so that the resistance becomes higher than a preset value.
Second, the threshold voltage of the MOS transistor, especially the MOS transistor formed in the silicidation region, varies due to penetration of the impurity implanted for promoting silicidation through the gate electrode and into the substrate.
Third, the resistance varies due to formation of voids after the impurity in the polysilicon member comes out during the annealing for activation. In addition, voids are also formed in the silicide film when the upper portion of the polysilicon member is silicided, which makes it impossible to sufficiently reduce the resistance of the silicide film.
A first object of the present invention is to provide a method of fabricating a semiconductor device having respective polysilicon members disposed in a silicidation region and in a non-silicidation region, wherein the resistance of each of the polysilicon members and the threshold voltage of a MOS transistor have reduced variations.
A second object of the present invention is to suppress an increase in the resistance of a silicide film by providing a semiconductor device having a polysilicon member with means for suppressing the formation of voids in the polysilicon member due to out-diffusion of an impurity.
A first method of fabricating a semiconductor device having a silicidation region and a non-silicidation region, wherein a MOS transistor comprising a gate electrode and heavily doped source/drain regions each having a silicided upper portion is disposed in the silicidation region, while an element comprising a polysilicon member having a non-silicided upper portion is disposed in the non-silicidation region, the method comprising the steps of: (a) forming a-gate insulating film and a polysilicon film on a semiconductor substrate; (b) implanting ions of an n-type impurity for resistance reduction into a portion of the polysilicon film by using a mask having an opening corresponding to an n-type impurity implantation region; (c) performing a first heat treatment for activating the n-type impurity; (d) after the step (c), implanting ions of a p-type impurity for resistance reduction into another portion of the polysilicon film by using a mask having an opening corresponding to a p-type impurity implantation region; (e) after the step (d), patterning the polysilicon film to form a gate electrode of the MOS transistor in the silicidation region and the polysilicon member in the non-silicidation region; (f) implanting impurity ions for forming the heavily doped source/drain regions of the MOS transistor; (g) after the step (f), forming an insulating film on the substrate; (h) forming a selective etching mask on the insulating film; (i) patterning the insulating film by using the selective etching mask to form a silicidation mask, the mask covering the non-silicidation region and having an opening over the silicidation region; (j) after the step (i), performing a second heat treatment for activating the p-type impurity; (k) after the step (j), implanting impurity ions for promoting silicidation into the gate electrode and heavily doped source/drain regions of the MOS transistor in the silicidation region; and (l) after the step (k), siliciding the respective upper portions of the gate electrode and heavily doped source/drain regions of the MOS transistor in the silicidation region.
In accordance with the method, the region heavily doped with the n-type impurity can be eliminated by the first heat treatment and the out-diffusion of the impurity implanted in the polysilicon member in the non-silicidation region can be prevented in the second heat treatment. This surely prevents variations in the resistance of the polysilicon member (such as the resistor film of a resistor) disposed in the non-silicidation region. Moreover, an increase in fabrication cost can be circumvented since the number of process steps is not increased.
In the first method of fabricating a semiconductor device, the first heat treatment is performed in an atmosphere containing oxygen, whereby oxide films are formed on the regions of the polysilicon film implanted with an n-type impurity, so that the out-diffusion of then-type impurity is suppressed during the heat treatment. As a consequence, variations in the resistance of the polysilicon film due to out-diffusion of the n-type impurity and variations in the resistance of the polysilicon film due to voids left as a result of out-diffusion of the n-type impurity are suppressed.
Preferably, a partial pressure of oxygen in the atmosphere containing oxygen in the first heat treatment is 5 to 30%.
In the first method of fabricating a semiconductor device, the second heat treatment is performed in an atmosphere containing oxygen, whereby oxide films are formed on the gate electrode and on the heavily doped source/drain regions which are exposed in the silicidation region, so that the out-diffusion of the n-type impurity in these regions is suppressed. As a consequence, variations in the resistances of these regions are suppressed. In the presence of the oxide film, variations in the threshold voltage of the MOS transistor due to penetration of the impurity ions for promoting silicidation through the gate electrode and into the semiconductor device in the subsequent step (k) are suppressed.
Preferably, a partial pressure of oxygen in the atmosphere containing oxygen in the second heat treatment is 5 to 30%.
In the step (h) of the first method of fabricating a semiconductor device, the selective etching mask is formed of a resist film, the method further comprising the step of: after the step (i) and prior to the step (j), removing the resist film by ashing using an oxygen plasma. As a result, oxide films can be formed on the gate electrode and on the heavily doped source/drain regions, while the resist film is removed. Consequently, variations in the resistances of the gate electrode and the heavily doped source/drain regions as described above and variations in the threshold voltage of the MOS transistor in the silicidation region are suppressed.
In the step (h) of the first method of fabricating a semiconductor device, the selective etching mask is formed of a resist film, the method further comprising the step of: after the step (i) and prior to the step (j), removing the resist film by using an aqueous solution of sulfuric acid and hydrogen peroxide and plasma oxidizing the respective surface portions of the gate electrode and the heavily doped source/drain regions in the silicidation region. As a result, oxide films can be formed on the gate electrode and on the heavily doped source/drain regions. Consequently, variations in the resistances of the gate electrode and the heavily doped source/drain regions as described above and variations in the threshold voltage of the MOS transistor in the silicidation region are suppressed.
In the step (b) of the first method of fabricating a semiconductor device, at least one of a resistor film of a resistor and a gate electrode of a high-breakdown-voltage transistor can be formed as the polysilicon member of the element in the non-silicidation region.
A second method of fabricating a semiconductor device according to the present invention comprises the steps of:(a) implanting ions of an impurity for resistance reduction into a polysilicon layer on a semiconductor substrate; and (b) performing a heat treatment with respect to the substrate in an atmosphere containing oxygen.
In accordance with the method, an oxide film is formed on he polysilicon film so that the out-diffusion of the impurity is suppressed during the heat treatment. As a consequence, variations in the resistance of the polysilicon layer due to out-diffusion of the impurity and variations in the resistance of the polysilicon layer due to voids left as a result of out-diffusion of the impurity are suppressed.
In the second method of fabricating a semiconductor device, if the polysilicon layer is a gate electrode of a MOS transistor, the method further comprises the steps of: (c) after the step (b), implanting an impurity for promoting silicidation into the polysilicon layer; and (d) after the step (c), siliciding an upper portion of the polysilicon layer. In addition to the foregoing effects, there is achieved the effect of inhibiting the impurity from penetrating the gate electrode during ion implantation for preamorphization in the case of performing the siliciding step thereafter. As a result, variations in the threshold voltage of the MOS transistor are suppressed.
In the second method of fabricating a semiconductor device, if the polysilicon layer is a resistive element of a resistor, the resistance of the resistor film can be maintained accurately within the permissible range by suppressing out-diffusion of the impurity.